General Competition (November 1994)

FLC/VLSI High-Definition Image Generators

Sponsor: Displaytech, Inc.

• Project Performance Period: 2/15/1995 - 2/14/1997
• Total project (est.): $3,251,000.00
• Requested ATP funds: $1,748,000.00

Displaytech, Inc., proposes to develop a new image-generation technology for advanced display, printing, and computing applications. At the heart of the technology is a silicon chip with circuitry densely patterned as a miniaturized high-resolution pixel array, each member of which being individually controllable. Over the array is a layer of ferroelectric liquid crystal (FLC) that can respond rapidly to electrical signals in the underlying VLSI (very large scale integration) circuitry by locally changing opacity (for grey scale imaging) or color. This "image on a chip" technology ought to be capable of full-color video-rate display with resolution of 2,000 pixels by 2,000 pixels, optical data rates in the gigabyte-per-second range, with low production costs. The device might be useful in heads-up displays, large high-definition displays that cannot be made economically with other technologies, low-cost color print heads, and optical memory systems. Displaytech's technical effort will be concentrated in three areas, with the primary focus on the development of processes amenable to mass manufacturing. In addition, Displaytech will work on device lifetime and reliability. A final major challenge will focus on establishing protocols by which the optical and electronic systems that generate or capture image signals can successfully integrate them with the technology of the imaging chip.

For project information:

George Clough, (303) 449-8933
george@displaytech.com

ATP Project Manager

Thomas Lettieri, (301) 975-3496
thomas.lettieri@nist.gov