General Competition (December 1992)

New Technology for High-Current, Parallel, Broad-Beam Implanters for Microelectronics Fabrication

Sponsor: Diamond Semiconductor Group, Inc.

• Project Performance Period: 3/1/1993 - 6/30/1994
• Total project (est.): $1,725,000.00
• Requested ATP funds: $1,327,000.00

Ion implantation is the standard technology for introducing carefully controlled impurities or dopants into specific locations in semiconductor wafers. Dopants control the electrical properties of the semiconductor, and as device sizes get smaller, accurate control of dopant placement becomes more critical. Competitive manufacturing has driven the size of production wafers up, making this more of a problem because of the difficulty in precisely scanning the implantation beam across the wafer. The beam strikes the wafer at varying angles, causing shadow effects, and ion channeling when the beam lines up with crystal planes in the wafer. State-of-the-art ion implanters have achieved some improvements in processing wafers up to 200 mm in size but at a cost in complexity and reliability. The technology would be difficult to extend to 300-mm wafers. Diamond has proposed a novel architecture for ion implantation that promises to overcome several of these problems. It should deliver a 350-mm-wide beam parallel to within a degree across the entire beam; uniform to within one percent at high currents and low energies. Uniform doping of 300-mm or larger wafers can be accomplished by moving the wafers through the beam at a uniform speed without scanning. The new architecture is significantly simpler than existing machines and so should be cheaper to build and maintain, and more reliable. The Diamond architecture should be uniquely suited to the production of 64- and 256-megabit DRAMs and similar large-scale, complex integrated circuits. Under the ATP, Diamond will construct and characterize a laboratory prototype ion beam machine using the new architecture, and design and test new approaches to wafer cooling. If successful, the technology will be important not only to the next generation of large, extremely dense integrated circuits, but to other large-scale semiconductor devices such as flat-panel displays and solar cells.

For project information:

Manny Sieradzki, (508) 281-4223

ATP Project Manager

Richard Bartholomew, (301) 975-4786
richard.bartholomew@nist.gov