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Project Brief


Novel Digital Planarization Process for 300/450 mm Wafer Semiconductor Manufacturing


Develop a novel chemical mechanical planarization (CMP) process for the semiconductor industry that offers better control in the processing of new copper/ultra-low-k dielectric interconnects in integrated circuit chips.

Sponsor: Sinmat Inc.

2153 SE Hawthorne Road
Box 2
Gainesville, FL 32641
  • Project Performance Period: 11/1/2007 - 3/21/2011
  • Total project (est.): $2,570,993.00
  • Requested ATP funds: $1,973,491.00

Sinmat has proposed developing a novel improvement on a key process technology for the semiconductor industry, a new planarization technique for wafer polishing that offers better control of the process and the ability to scale the process to larger wafer sizes without impairing performance. Chemical-mechanical planarization (CMP) is a process used to smooth and polish semiconductor wafers, either to achieve a better surface for lithography or to remove excess material from the surface. It uses a combination of corrosive chemicals to weaken the material to be removed and rubbing with an abrasive. Two different trends in semiconductor manufacturing are driving the need for an improved planarization process. The trend toward smaller and smaller feature sizes has led to basic changes in interconnects, the "wires" of an integrated circuit. Aluminum interconnects are being replaced by a combination of copper on a so—called ultra—low—k (ULK) dielectric that provides faster signals. At the same time, production efficiencies are driving the use of larger semiconductor wafers, that are moving from 300 millimeters to 450 mm or larger. CMP is an critical process step for the new copper interconnects, but existing CMP techniques already are difficult to control because of the large number of process variables (more than 20), and the process does not scale well to larger wafer sizes. The large number of process variables makes it difficult to control the amount of material removed in CMP, particularly when processing very dissimilar materials such as copper and fragile ULK compounds. Sinmat plans to achieve better control over the process by using a novel approach that results in controlled removal of material uniformly from the wafer. Because the process is largely independent of most of the processing paramters—fluid flow, polishing speeds, and others—it should easily scale to larger wafers. Key technical barriers include formulating and optimizing the slurries for different materials, especially the difficult-to-process ULK materials, and optimizing the technique to achieve process times competitive with conventional CMP. If successful, Sinmat's technology could significantly improve semiconductor chip yields by reducing non-uniformity and defect rates, especially on large wafers. The company estimates that the technology could reduce CMP—related manufacturing costs by as much as 80 percent.

For project information:
Rajiv Singh, (352) 334-7237
rksingh@sinmat.com

ATP Project Manager
Gerald Castellucci, (301) 975-2435
gerald.castellucci@nist.gov


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